Functional verification of programmable embedded architectures : a top-down approach / Prabhat Mishra, Nikil D. Dutt.

By:

Mishra, Prabhat, 1973- [author.]

Contributor(s):

Dutt, Nikil [author.]

Material type: Text

TextPublisher: New York : Springer, 2005Description: xviii, 180 pages : illustrations ; 24 cmContent type:

text

Media type:

unmediated

Carrier type:

volume

ISBN:

0387261435
9780387261430

Subject(s):

DDC classification:

004.22 22

LOC classification:

TK7895.E42 M57 2005

Contents:

1. Introduction -- 2. Architecture specification -- 3. Validation of specification -- 4. Executable model generation -- 5. Design validation -- 6. Functional test generation -- 7. Conclusions -- App. A. Survey of contemporary ADLs -- App. B. Specification of DLX processor -- App. C. Interrupts & exceptions in ADL -- App. D. Validation of DLX specification -- App. E. Design space exploration.

Review: "Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems."--BOOK JACKET.

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Holdings
Item type	Current library	Call number	Copy number	Status	Date due	Barcode
Book	City Campus City Campus Main Collection	004.22 MIS (Browse shelf(Opens below))	1	Available		A400044B

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Includes bibliographical references and index.

"Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems."--BOOK JACKET.

Machine converted from AACR2 source record.

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