MARC details
| 000 -LEADER |
|---|
| fixed length control field |
02990cam a22004214i 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20221101192844.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
000324s2001 nyua b 001 0 eng d |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
|---|
| LC control number |
00036977 |
| 011 ## - LINKING LIBRARY OF CONGRESS CONTROL NUMBER [OBSOLETE] |
|---|
| Local cataloguing issues note |
BIB MATCHES WORLDCAT |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
078036001X |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780780360013 |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(ATU)b10685054 |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(DLC) 00036977 |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(OCoLC)43884738 |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
DLC |
| Language of cataloging |
eng |
| Description conventions |
rda |
| Modifying agency |
ATU |
| 042 ## - AUTHENTICATION CODE |
|---|
| Authentication code |
pcc |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7895.M5 |
| Item number |
D47 2001 |
| 082 0# - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.3815 |
| 245 00 - TITLE STATEMENT |
|---|
| Title |
Design of high-performance microprocessor circuits / |
| Statement of responsibility, etc. |
Anantha Chandrakasan, William J. Bowhill, Frank Fox, [editors]. |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
|---|
| Place of production, publication, distribution, manufacture |
New York : |
| Name of producer, publisher, distributor, manufacturer |
IEEE Press, |
| Date of production, publication, distribution, manufacture, or copyright notice |
[2001] |
| 264 #4 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
|---|
| Date of production, publication, distribution, manufacture, or copyright notice |
©2001 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xx, 557 pages : |
| Other physical details |
illustrations ; |
| Dimensions |
26 cm |
| 336 ## - CONTENT TYPE |
|---|
| Content type term |
text |
| Content type code |
txt |
| Source |
rdacontent |
| 337 ## - MEDIA TYPE |
|---|
| Media type term |
unmediated |
| Media type code |
n |
| Source |
rdamedia |
| 338 ## - CARRIER TYPE |
|---|
| Carrier type term |
volume |
| Carrier type code |
nc |
| Source |
rdacarrier |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc. note |
Includes bibliographical references and index. |
| 505 00 - FORMATTED CONTENTS NOTE |
|---|
| Title |
Preface -- |
| Miscellaneous information |
Part I. |
| Title |
Overview -- |
| Miscellaneous information |
Chapter 1. |
| Title |
Impact of Physical Technology on Architecture -- |
| Miscellaneous information |
Part II. |
| Title |
Technology Issues -- |
| Miscellaneous information |
Chapter 2. |
| Title |
CMOS Scaling and Issues in Sub-0.25 [mu]m Systems -- |
| Miscellaneous information |
Chapter 3. |
| Title |
Techniques for Leakage Power Reduction -- |
| Miscellaneous information |
Chapter 4. |
| Title |
Low-Voltage Technologies -- |
| Miscellaneous information |
Chapter 5. |
| Title |
Soi Technology and Circuits -- |
| Miscellaneous information |
Chapter 6. |
| Title |
Models of Process Variations in Device and Interconnect -- |
| Miscellaneous information |
Part III. |
| Title |
Circuit Styles for Logic -- |
| Miscellaneous information |
Chapter 7. |
| Title |
Basic Logic Families -- |
| Miscellaneous information |
Chapter 8. |
| Title |
Issues in Dynamic Logic Design -- |
| Miscellaneous information |
Chapter 9. |
| Title |
Self-Timed Pipelines -- |
| Miscellaneous information |
Chapter 10. |
| Title |
High-Speed VLSI Airthmetic Units: Adders and Multipliers -- |
| Miscellaneous information |
Part IV. |
| Title |
Clocking -- |
| Miscellaneous information |
Chapter 11. |
| Title |
Clocked Storage Elements -- |
| Miscellaneous information |
Chapter 12. |
| Title |
Design of High-Speed CMOS PLLs and DLLs -- |
| Miscellaneous information |
Chapter 13. |
| Title |
Clock Distribution -- |
| Miscellaneous information |
Part V. |
| Title |
Memory System Design -- |
| Miscellaneous information |
Chapter 14. |
| Title |
Register Files and Chahes -- |
| Miscellaneous information |
Chapter 15. |
| Title |
Embedded Dram -- |
| Miscellaneous information |
Part VI. |
| Title |
Interconnect and I/O -- |
| Miscellaneous information |
Chapter 16. |
| Title |
Analyzing on-Chip Interconnect Effects -- |
| Miscellaneous information |
Chapter 17. |
| Title |
Techniques for Driving Interconnect -- |
| Miscellaneous information |
Chapter 18. |
| Title |
I/O and ESD Circuit Design -- |
| Miscellaneous information |
Chapter 19. |
| Title |
High-Speed Electrical Signaling -- |
| Miscellaneous information |
Part VII. |
| Title |
Reliability -- |
| Miscellaneous information |
Chapter 20. |
| Title |
Electromigration Reliability -- |
| Miscellaneous information |
Chapter 21. |
| Title |
Hot Carrier Reliability -- |
| Miscellaneous information |
Part VIII. |
| Title |
Cad Tools and Test -- |
| Miscellaneous information |
Chapter 22. |
| Title |
Overview of Computer-Aided Design Tools -- |
| Miscellaneous information |
Chapter 23. |
| Title |
Timing Verification -- |
| Miscellaneous information |
Chapter 24. |
| Title |
Design and Analysis of Power Distribution Networks -- |
| Miscellaneous information |
Chapter 25. |
| Title |
Testing of High-Performance Processors -- |
| -- |
Index. |
| 588 ## - SOURCE OF DESCRIPTION NOTE |
|---|
| Source of description note |
Machine converted from AACR2 source record. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Microprocessors |
| General subdivision |
Design and construction |
| 9 (RLIN) |
786413 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Logic circuits |
| 9 (RLIN) |
320210 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Chandrakasan, Anantha P. |
| 9 (RLIN) |
1042786 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Bowhill, William J. |
| 9 (RLIN) |
1042787 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Fox, Frank, |
| Dates associated with a name |
1952- |
| 9 (RLIN) |
224829 |
| 907 ## - LOCAL DATA ELEMENT G, LDG (RLIN) |
|---|
| a |
.b10685054 |
| b |
11-07-17 |
| c |
27-10-15 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
Book |
| 945 ## - LOCAL PROCESSING INFORMATION (OCLC) |
|---|
| a |
621.3815 DES |
| g |
1 |
| i |
A253784B |
| j |
0 |
| l |
cmain |
| o |
- |
| p |
$298.77 |
| q |
- |
| r |
- |
| s |
- |
| t |
0 |
| u |
1 |
| v |
0 |
| w |
0 |
| x |
0 |
| y |
.i11663479 |
| z |
28-10-15 |
| 998 ## - LOCAL CONTROL INFORMATION (RLIN) |
|---|
| -- |
(2)b |
| -- |
(2)c |
| Operator's initials, OID (RLIN) |
06-04-16 |
| Cataloger's initials, CIN (RLIN) |
m |
| First date, FD (RLIN) |
a |
| -- |
eng |
| -- |
nyu |
| -- |
0 |
