000			04943cam a2200409 i 4500
005			20221115155252.0
008			120426s2013 nyua 000 0 eng d
011			_aBIB MATCHES WORLDCAT
020			_a1461434661
020			_a9781461434665
035			_a(ATU)b12758565
035			_a(OCoLC)792880587
040			_aBTCTA _beng _erda _cBTCTA _dYDXCP _dCDX _dBWX _dOCLCO _dATU
050	0	4	_aTK7887.6 _b.F54 2013
082	0	4	_a621.38159 _223
100	1		_aFigueiredo, Michael, _eauthor. _91097971
245	1	0	_aReference-free CMOS Pipeline Analog-to-digital Converters / _cMichael Figueiredo, Joao Goes, Guiomar Evans.
246	3		_aReference-free CMOS Pipeline Analogue-to-digital Converters
264		1	_aNew York : _bSpringer Verlag, _c2013.
300			_axvi, 182 pages : _billustrations ; _c25 cm
336			_atext _btxt _2rdacontent
337			_aunmediated _bn _2rdamedia
338			_avolume _bnc _2rdacarrier
505	0		_aGeneral Overview of Pipeline Analog-to-Digital Converters -- Capacitor Mismatch-Insensitive Multiplying-DAC Topologies with Unity Feedback Factor -- Application of Circuit Enhancement Techniques to ADC Building Blocks -- Design of a 7-bit 1 GS/s CMOS Two-Way Interleaved Pipeline ADC -- Integrated Prototypes and Experimental Results.
520			_a"This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits."--pub. desc.
520	8		_aAnnotation _bThis book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.
588			_aMachine converted from non-AACR2, non-ISBD source record.
650		0	_aAnalog-to-digital converters _xDesign _9789600
650		0	_aMetal oxide semiconductors, Complementary _xDesign _9789454
650		0	_aSignal processing _xDigital techniques _xEquipment and supplies _9348727
700	1		_aGoes, João, _eauthor. _91231711
700	1		_aEvans, Guiomar, _eauthor. _91097972
907			_a.b12758565 _b03-10-17 _c28-10-15
942			_cB
945			_a621.38159 REF _g1 _iA517448B _j0 _lcmain _o- _p$136.55 _q- _r- _s- _t0 _u0 _v0 _w0 _x0 _y.i13290095 _z29-10-15
998			_ab _ac _b06-04-16 _cm _da _feng _gnyu _h0
999			_c1243891 _d1243891