TY  - BOOK
AU  - Figueiredo,Michael
AU  - Goes,João
AU  - Evans,Guiomar
TI  - Reference-free CMOS Pipeline Analog-to-digital Converters
SN  - 1461434661
AV  - TK7887.6 .F54 2013
U1  - 621.38159 23
PY  - 2013///
CY  - New York
PB  - Springer Verlag
KW  - Analog-to-digital converters
KW  - Design
KW  - Metal oxide semiconductors, Complementary
KW  - Signal processing
KW  - Digital techniques
KW  - Equipment and supplies
N1  - General Overview of Pipeline Analog-to-Digital Converters -- Capacitor Mismatch-Insensitive Multiplying-DAC Topologies with Unity Feedback Factor -- Application of Circuit Enhancement Techniques to ADC Building Blocks -- Design of a 7-bit 1 GS/s CMOS Two-Way Interleaved Pipeline ADC -- Integrated Prototypes and Experimental Results
N2  - "This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits."--pub. desc; Annotation; This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits
ER  -