TY  - BOOK
AU  - Chandrakasan,Anantha P.
AU  - Bowhill,William J.
AU  - Fox,Frank
TI  - Design of high-performance microprocessor circuits
SN  - 078036001X
AV  - TK7895.M5 D47 2001
U1  - 621.3815 
PY  - 2001///]
CY  - New York
PB  - IEEE Press
KW  - Microprocessors
KW  - Design and construction
KW  - Logic circuits
N1  - Includes bibliographical references and index; Preface --; Part I; Overview --; Chapter 1; Impact of Physical Technology on Architecture --; Part II; Technology Issues --; Chapter 2; CMOS Scaling and Issues in Sub-0.25 [mu]m Systems --; Chapter 3; Techniques for Leakage Power Reduction --; Chapter 4; Low-Voltage Technologies --; Chapter 5; Soi Technology and Circuits --; Chapter 6; Models of Process Variations in Device and Interconnect --; Part III; Circuit Styles for Logic --; Chapter 7; Basic Logic Families --; Chapter 8; Issues in Dynamic Logic Design --; Chapter 9; Self-Timed Pipelines --; Chapter 10; High-Speed VLSI Airthmetic Units: Adders and Multipliers --; Part IV; Clocking --; Chapter 11; Clocked Storage Elements --; Chapter 12; Design of High-Speed CMOS PLLs and DLLs --; Chapter 13; Clock Distribution --; Part V; Memory System Design --; Chapter 14; Register Files and Chahes --; Chapter 15; Embedded Dram --; Part VI; Interconnect and I/O --; Chapter 16; Analyzing on-Chip Interconnect Effects --; Chapter 17; Techniques for Driving Interconnect --; Chapter 18; I/O and ESD Circuit Design --; Chapter 19; High-Speed Electrical Signaling --; Part VII; Reliability --; Chapter 20; Electromigration Reliability --; Chapter 21; Hot Carrier Reliability --; Part VIII; Cad Tools and Test --; Chapter 22; Overview of Computer-Aided Design Tools --; Chapter 23; Timing Verification --; Chapter 24; Design and Analysis of Power Distribution Networks --; Chapter 25; Testing of High-Performance Processors --; Index
ER  -