TY  - BOOK
AU  - Muller,Richard S.
AU  - Kamins,Theodore I.
AU  - Chan,Mansun
TI  - Device electronics for integrated circuits
SN  - 0471593982
AV  - TK7871.85. M825 2003
U1  - 621.38152 
PY  - 2003///]
CY  - New York, NY
PB  - John Wiley & Sons, Inc.
KW  - Semiconductors
KW  - Integrated circuits
N1  - Includes bibliographical references and index; 1; Semiconductor Electronics; 1.1; Physics of Semiconductor Materials; 1.2; Free Carriers in Semiconductors; 1.3; Device: Hall-Effect Magnetic Sensor --; 2; Silicon Technology; 2.1; The Silicon Planar Process; 2.2; Crystal Growth; 2.3; Thermal Oxidation; 2.4; Lithography and Pattern Transfer; 2.5; Dopant Addition and Diffusion; 2.6; Chemical Vapor Deposition; 2.7; Interconnection and Packaging; 2.8; Compound-Semiconductor Processing; 2.9; Numerical Simulation; 2.10; Device: Integrated-Circuit Resistor --; 3; Metal-Semiconductor Contacts; 3.1; Equilibrium in Electronic Systems; 3.2; Idealized Metal-Semiconductor Junctions; 3.3; Current-Voltage Characteristics; 3.4; Nonrectifying (Ohmic) Contacts; 3.5; Surface Effects; 3.6; Metal-Semiconductor Devices: Schottky Diodes --; 4; pn Junctions; 4.1; Graded Impurity Distributions; 4.2; The pn Junction; 4.3; Reverse-Biased pn Junctions; 4.4; Junction Breakdown; 4.5; Device: Junction Field-Effect Transistors --; 5; Currents in pn Junctions; 5.1; Continuity Equation; 5.2; Generation and Recombination; 5.3; Current-Voltage Characteristics of pn Junctions; 5.4; Charge Storage and Diode Transients; 5.5; Device Modeling and Simulation; 5.6; Devices --; 6; Bipolar Transistors I: Basic Properties; 6.1; Transistor Action; 6.2; Active Bias; 6.3; Transistor Switching; 6.4; Ebers-Moll Model; 6.5; Devices: Planar Bipolar Amplifying and Switching Transistors; 6.6; Devices: Heterojunction Bipolar Transistors --; 7; Bipolar Transistors II: Limitations and Models; 7.1; Effects of Collector Bias Variation (Early Effect); 7.2; Effects at Low and High Emitter Bias; 7.3; Base Transit Time; 7.4; Charge-Control Model; 7.5; Small-Signal Transistor Model; 7.6; Frequency Limits of Bipolar Transistors; 7.7; Bipolar Transistor Model for Computer Simulation; 7.8; Devices: pnp Transistors --; 8; Properties of the Metal-Oxide-Silicon System; 8.1; The Ideal MOS Structure; 8.2; Analysis of the Ideal MOS Structure; 8.3; MOS Electronics; 8.4; Capacitance of the MOS System; 8.5; Non-Ideal MOS System; 8.6; Surface Effects on pn Junctions; 8.7; MOS Capacitors and Charge-Coupled Devices --; 9; MOS Field-Effect Transistors I: Physical Effects and Models; 9.1; Basic MOSFET Behavior; 9.2; Improved Models for Short-Channel MOSFETs; 9.3; Devices: Complementary MOSFETs - CMOS; 9.4; Looking Ahead --; 10; MOS Field-Effect Transistors II: High-Field Effects; 10.1; Electric Fields in the Velocity-Saturation Region; 10.2; Substrate Current; 10.3; Gate Current; 10.4; Device Degradation; 10.5; Devices: MOS Nonvolatile Memory Structures
ER  -