MARC details
000 -LEADER |
fixed length control field |
04943cam a2200409 i 4500 |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20221115155252.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
120426s2013 nyua 000 0 eng d |
011 ## - LINKING LIBRARY OF CONGRESS CONTROL NUMBER [OBSOLETE] |
Local cataloguing issues note |
BIB MATCHES WORLDCAT |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
1461434661 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9781461434665 |
035 ## - SYSTEM CONTROL NUMBER |
System control number |
(ATU)b12758565 |
035 ## - SYSTEM CONTROL NUMBER |
System control number |
(OCoLC)792880587 |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
BTCTA |
Language of cataloging |
eng |
Description conventions |
rda |
Transcribing agency |
BTCTA |
Modifying agency |
YDXCP |
-- |
CDX |
-- |
BWX |
-- |
OCLCO |
-- |
ATU |
050 04 - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
TK7887.6 |
Item number |
.F54 2013 |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
Classification number |
621.38159 |
Edition number |
23 |
100 1# - MAIN ENTRY--PERSONAL NAME |
Personal name |
Figueiredo, Michael, |
Relator term |
author. |
9 (RLIN) |
1097971 |
245 10 - TITLE STATEMENT |
Title |
Reference-free CMOS Pipeline Analog-to-digital Converters / |
Statement of responsibility, etc. |
Michael Figueiredo, Joao Goes, Guiomar Evans. |
246 3# - VARYING FORM OF TITLE |
Title proper/short title |
Reference-free CMOS Pipeline Analogue-to-digital Converters |
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
Place of production, publication, distribution, manufacture |
New York : |
Name of producer, publisher, distributor, manufacturer |
Springer Verlag, |
Date of production, publication, distribution, manufacture, or copyright notice |
2013. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
xvi, 182 pages : |
Other physical details |
illustrations ; |
Dimensions |
25 cm |
336 ## - CONTENT TYPE |
Content type term |
text |
Content type code |
txt |
Source |
rdacontent |
337 ## - MEDIA TYPE |
Media type term |
unmediated |
Media type code |
n |
Source |
rdamedia |
338 ## - CARRIER TYPE |
Carrier type term |
volume |
Carrier type code |
nc |
Source |
rdacarrier |
505 0# - FORMATTED CONTENTS NOTE |
Formatted contents note |
General Overview of Pipeline Analog-to-Digital Converters -- Capacitor Mismatch-Insensitive Multiplying-DAC Topologies with Unity Feedback Factor -- Application of Circuit Enhancement Techniques to ADC Building Blocks -- Design of a 7-bit 1 GS/s CMOS Two-Way Interleaved Pipeline ADC -- Integrated Prototypes and Experimental Results. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
"This book shows that digitally assisted analog-to-digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits."--pub. desc. |
520 8# - SUMMARY, ETC. |
Summary, etc. |
Annotation |
Expansion of summary note |
This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits. |
588 ## - SOURCE OF DESCRIPTION NOTE |
Source of description note |
Machine converted from non-AACR2, non-ISBD source record. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Analog-to-digital converters |
General subdivision |
Design |
9 (RLIN) |
789600 |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Metal oxide semiconductors, Complementary |
General subdivision |
Design |
9 (RLIN) |
789454 |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Signal processing |
General subdivision |
Digital techniques |
-- |
Equipment and supplies |
9 (RLIN) |
348727 |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Goes, João, |
Relator term |
author. |
9 (RLIN) |
1231711 |
700 1# - ADDED ENTRY--PERSONAL NAME |
Personal name |
Evans, Guiomar, |
Relator term |
author. |
9 (RLIN) |
1097972 |
907 ## - LOCAL DATA ELEMENT G, LDG (RLIN) |
a |
.b12758565 |
b |
03-10-17 |
c |
28-10-15 |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Koha item type |
Book |
945 ## - LOCAL PROCESSING INFORMATION (OCLC) |
a |
621.38159 REF |
g |
1 |
i |
A517448B |
j |
0 |
l |
cmain |
o |
- |
p |
$136.55 |
q |
- |
r |
- |
s |
- |
t |
0 |
u |
0 |
v |
0 |
w |
0 |
x |
0 |
y |
.i13290095 |
z |
29-10-15 |
998 ## - LOCAL CONTROL INFORMATION (RLIN) |
-- |
b |
-- |
c |
Operator's initials, OID (RLIN) |
06-04-16 |
Cataloger's initials, CIN (RLIN) |
m |
First date, FD (RLIN) |
a |
-- |
eng |
-- |
nyu |
-- |
0 |