Logic design / (Record no. 1149782)

MARC details
000 -LEADER
fixed length control field 03501cam a2200421 i 4500
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20211105144835.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 030414s2003 flua b 001 0 eng d
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER
LC control number 2002042926
011 ## - LINKING LIBRARY OF CONGRESS CONTROL NUMBER [OBSOLETE]
Local cataloguing issues note BIB MATCHES WORLDCAT
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 0849317347
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780849317347
035 ## - SYSTEM CONTROL NUMBER
System control number (ATU)b10876790
035 ## - SYSTEM CONTROL NUMBER
System control number (DLC) 2002042926
035 ## - SYSTEM CONTROL NUMBER
System control number (OCoLC)51178054
040 ## - CATALOGING SOURCE
Original cataloging agency DLC
Language of cataloging eng
Description conventions rda
Modifying agency ATU
042 ## - AUTHENTICATION CODE
Authentication code pcc
050 00 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7868.L6
Item number V63 2003
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.395
Edition number 21
245 00 - TITLE STATEMENT
Title Logic design /
Statement of responsibility, etc. editor-in-chief, Wai-Kai Chen.
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE
Place of production, publication, distribution, manufacture Boca Raton, Fla. :
Name of producer, publisher, distributor, manufacturer CRC Press,
Date of production, publication, distribution, manufacture, or copyright notice [2003]
264 #4 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE
Date of production, publication, distribution, manufacture, or copyright notice ©2003
300 ## - PHYSICAL DESCRIPTION
Extent chapter pagings 1-6, 2-9, 3-11, 4-14, 5-9, 6-19, 7-6, 8-12, 9-9, 10-6, 11-7, 12-24, 13-13, 14-10, 15-11, 16-12, 17-7, 18-9, 19-5, 20-10, 21-5, 22-10, 23-3, 24-4, 25-5, 26-18, 27-18, 28-26; index i-14 :
Other physical details illustrations ;
Dimensions 27 cm.
336 ## - CONTENT TYPE
Content type term text
Content type code txt
Source rdacontent
337 ## - MEDIA TYPE
Media type term unmediated
Media type code n
Source rdamedia
338 ## - CARRIER TYPE
Carrier type term volume
Carrier type code nc
Source rdacarrier
490 1# - SERIES STATEMENT
Series statement Principles and applications in engineering series
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc. note Includes bibliographical references and index.
505 00 - FORMATTED CONTENTS NOTE
Miscellaneous information 1.
Title Expressions of Logic Functions /
Statement of responsibility Saburo Muroga --
Miscellaneous information 2.
Title Basic Theory of Logic Functions /
Statement of responsibility Saburo Muroga --
Miscellaneous information 3.
Title Simplification of Logic Expressions /
Statement of responsibility Saburo Muroga --
Miscellaneous information 4.
Title Binary Decision Diagrams /
Statement of responsibility Shin-ichi Minato and Saburo Muroga --
Miscellaneous information 5.
Title Logic Synthesis with AND and OR Gates in Two Levels /
Statement of responsibility Saburo Muroga --
Miscellaneous information 6.
Title Sequential Networks /
Statement of responsibility Saburo Muroga --
Miscellaneous information 7.
Title Logic Synthesis with AND and OR Gates in Multi-levels /
Statement of responsibility Yuichi Nakamura and Saburo Muroga --
Miscellaneous information 8.
Title Logic Properties of Transistor Circuits /
Statement of responsibility Saburo Muroga --
Miscellaneous information 9.
Title Logic Synthesis with NAND (or NOR) Gates in Multi-levels /
Statement of responsibility Saburo Muroga --
Miscellaneous information 10.
Title Logic Synthesis with a Minimum Number of Negative Gates /
Statement of responsibility Saburo Muroga --
Miscellaneous information 11.
Title Logic Synthesizer with Optimizations in Two Phases /
Statement of responsibility Ko Yoshikawa and Saburo Muroga --
Miscellaneous information 12.
Title Logic Synthesizer by the Transduction Method /
Statement of responsibility Saburo Muroga --
Miscellaneous information 13.
Title Emitter-Coupled Logic /
Statement of responsibility Saburo Muroga --
Miscellaneous information 14.
Title CMOS /
Statement of responsibility Saburo Muroga --
Miscellaneous information 15.
Title Pass Transistors /
Statement of responsibility Kazuo Yano and Saburo Muroga --
Miscellaneous information 16.
Title Adders /
Statement of responsibility Naofumi Takagi, Haruyuki Tago, Charles R. Baugh and Saburo Muroga --
Miscellaneous information 17.
Title Multipliers /
Statement of responsibility Naofumi Takagi, Charles R. Baugh and Saburo Muroga --
Miscellaneous information 18.
Title Dividers /
Statement of responsibility Naofumi Takagi and Saburo Muroga --
Miscellaneous information 19.
Title Full-Custom and Semi-Custom Design /
Statement of responsibility Saburo Muroga --
Miscellaneous information 20.
Title Programmable Logic Devices /
Statement of responsibility Saburo Muroga --
Miscellaneous information 21.
Title Gate Arrays /
Statement of responsibility Saburo Muroga --
Miscellaneous information 22.
Title Field-Programmable Gate Arrays /
Statement of responsibility Saburo Muroga --
Miscellaneous information 23.
Title Cell-Library Design Approach /
Statement of responsibility Saburo Muroga --
Miscellaneous information 24.
Title Comparison of Different Design Approaches /
Statement of responsibility Saburo Muroga --
Miscellaneous information 25.
Title Materials /
Statement of responsibility Stephen I. Long --
Miscellaneous information 26.
Title Compound Semiconductor Devices for Digital Circuits /
Statement of responsibility Donald B. Estreich --
Miscellaneous information 27.
Title Logic Design Principles and Examples /
Statement of responsibility Stephen I. Long --
Miscellaneous information 28.
Title Logic Design Examples /
Statement of responsibility Charles E. Chang, Meera Venkataraman and Stephen I. Long.
588 ## - SOURCE OF DESCRIPTION NOTE
Source of description note Machine converted from AACR2 source record.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Logic circuits
General subdivision Design and construction
9 (RLIN) 786483
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Integrated circuits
General subdivision Very large scale integration
9 (RLIN) 331503
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Chen, Wai-Kai,
Dates associated with a name 1936-
Relator term editor.
9 (RLIN) 226855
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Principles and applications in engineering.
9 (RLIN) 263048
907 ## - LOCAL DATA ELEMENT G, LDG (RLIN)
a .b10876790
b 03-10-17
c 27-10-15
998 ## - LOCAL CONTROL INFORMATION (RLIN)
-- (2)b
-- (2)c
Operator's initials, OID (RLIN) 06-04-16
Cataloger's initials, CIN (RLIN) m
First date, FD (RLIN) a
-- eng
-- flu
-- 0
945 ## - LOCAL PROCESSING INFORMATION (OCLC)
a 621.395 LOG
g 1
i A260134B
j 0
l cmain
o -
p $142.50
q -
r -
s -
t 0
u 2
v 0
w 0
x 0
y .i12057484
z 29-10-15
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Book
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Shelving location Date acquired Cost, normal purchase price Inventory number Total Checkouts Total Renewals Full call number Barcode Date last seen Date last checked out Copy number Cost, replacement price Price effective from Koha item type
        City Campus City Campus City Campus Main Collection 29/10/2015 142.50 i12057484 3   621.395 LOG A260134B 19/10/2023 11/10/2023 1 142.50 31/10/2021 Book

Powered by Koha